class LinkManagementController extends Module
LinkManagementController for top level FDI/RDI state machine implementation, decoding the sideband messages and arbitration of triggers for the D2D adapter state machine
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- new LinkManagementController(fdiParams: FdiParams, rdiParams: RdiParams, sbParams: SidebandParams)
- fdiParams
FdiParams
- rdiParams
RdiParams
- sbParams
SidebandParams TODO: parity module and parity negotiation, PM states
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- val disabled_entry: Bool
- val disabled_sb_rdy: Bool
- val disabled_sb_snd: UInt
- val disabled_submodule: LinkDisabledSubmodule
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- val fdiParams: FdiParams
- val fdi_lp_state_req_prev_reg: interfaces.PhyStateReq.Type
- val fdi_pl_inband_pres_reg: Bool
- val fdi_pl_rxactive_req_reg: Bool
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- val io: LinkManagementControllerIO
- final def isInstanceOf[T0]: Boolean
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- val link_state_reg: interfaces.PhyState.Type
- val linkerror_phy_sts: Bool
- val linkinit_fdi_pl_inband_pres: Bool
- val linkinit_fdi_pl_rxactive_req: Bool
- val linkinit_rdi_lp_state_req: interfaces.PhyStateReq.Type
- val linkinit_sb_rdy: Bool
- val linkinit_sb_snd: UInt
- val linkinit_submodule: LinkInitSubmodule
- val linkmgmt_stallreq_reg: Bool
- val linkreset_entry: Bool
- val linkreset_sb_rdy: Bool
- val linkreset_sb_snd: UInt
- val linkreset_submodule: LinkResetSubmodule
- final lazy val name: String
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- val negotiation_complete: Bool
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- val parity_negotiation_sb_rdy: Bool
- val parity_negotiation_sb_snd: UInt
- val parity_negotiation_submodule: ParityNegotiationSubmodule
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- val rdiParams: RdiParams
- val rdi_lp_linkerror_reg: Bool
- val rdi_lp_state_req_reg: interfaces.PhyStateReq.Type
- final val reset: Reset
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- val retrain_phy_sts: Bool
- val rx_active: Bool
- val rx_deactive: Bool
- val sbParams: SidebandParams
- val stallhandler_handshake_done: Bool
- def suggestName(seed: => String): LinkManagementController.this.type
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(Since version Chisel 3.5) Use withClock at Module instantiation