class ProtocolLayer extends Module
Class to handle the FDI signalling between the D2D adapter and protocol layer. The class interacts with the tilelink front to get TL packets translated to UCIe flit and sent over the FDI signals to the D2D adapter. It also instantiates sideband node to orchestrate register access from system over the SB messaging. Finally, it handles the auxillary signalling required for link initialization and link managements.
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- val lp_rx_active_pl_state: Bool
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- val pl_protocol_flitfmt_reg: UInt
- val pl_protocol_reg: UInt
pl_protocol saves pl_protocol and flitfmt, resets and negotiates if protocol/flitfmt is not raw Expects ProtocolID.STREAM and ProtocolFlitFmt.RAW if implemented WARNING: HAS NOT IMPLEMENTED RENEGOTIATION LOGIC, the d2d ties these to raw
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(Since version Chisel 3.5) Use withClock at Module instantiation